Hardware / ESP32-S3 Baseboard v0.1
MCP-Ready
Embedded Board
The Pclika baseboard is designed specifically for AI-driven hardware interaction. Every pin, peripheral, and power rail is documented and exposed as an MCP tool.
Core Specs
MCU
- ESP32-S3-WROOM-1-N16R8
- Xtensa LX7 dual-core 240 MHz
- 16 MB Flash · 8 MB PSRAM
- Wi-Fi 802.11 b/g/n · BLE 5.0
Power
- USB-C input (USB 2.0)
- AMS1117-3.3 LDO (800 mA)
- 500 mA polyfuse protection
- 100 µF + 10 µF bulk caps
USB / UART
- CH340C USB-Serial bridge
- USBLC6-2SC6 ESD protection
- Auto DTR/RTS flash boot
- UART0/1/2 exposed on headers
IO
- I2C (SDA/SCL) + JST SH 4P
- SPI (MOSI/MISO/SCK/CS)
- PWM × 4 (Servo headers)
- ADC × 4 (CH0–CH3)
- microSD (SPI mode)
- M.2 FPGA expansion slot
Onboard Peripherals
- WS2812B RGB LED × 4
- BOOT / RESET / USER buttons × 3
- Blue status LED + resistor
- RED error LED + resistor
PCB
- 65 × 45 mm · 4-layer FR-4
- 1.6 mm · Black soldermask
- ENIG surface finish
- 4 × M2.5 mounting holes
Key Components — JLCPCB LCSC Numbers
| Ref | Component | LCSC | Notes |
|---|
| U1 | ESP32-S3-WROOM-1-N16R8 | C2913197 | Main MCU |
| U4 | CH340C | C84681 | USB-Serial bridge |
| U2 | AMS1117-3.3 | C6187 | 3.3 V LDO |
| U3 | USBLC6-2SC6 | C2827693 | USB ESD protection |
| LED3 | WS2812B-2020 | C114586 | × 4, RGB addressable |
| J1 | USB-C Receptacle TYPE-C-31-M-12 | C165948 | HRO 14-pin |
| C1 | 100 µF 10 V electrolytic | C16780 | Bulk cap |
Manufacturing Flow
# 1. Route traces in KiCad 8 <span class="status-wip">IN PROGRESS</span>
# Tools → Update PCB from Schematic (Ctrl+U) → Route → DRC
# 2. Generate Gerbers
cd hardware/kicad
./export_gerbers.sh
# → manufacturing/pclika-esp32s3-v01-gerbers.zip
# 3. Upload to JLCPCB
# See: hardware/kicad/JLCPCB_ORDER_GUIDE.md
# PCB: 4-layer · Black · ENIG · 65×45mm · 50 pcs ≈ ¥200
# SMT: BOM jlcpcb_bom.csv + CPL component_placement_top.csv ≈ ¥3,500/50pcs
Repository Files
| File | Description | Status |
|---|
| pclika-esp32s3-v01.kicad_sch | Complete schematic (57 KB) | Done |
| pclika-esp32s3-v01.kicad_pcb | PCB layout (board outline, pours, mounting holes) | Routing |
| pclika-esp32s3-v01.kicad_pro | Project file with net classes | Done |
| pclika-esp32s3-v01.kicad_dru | DRC rules (USB diff pair, antenna keepout) | Done |
| jlcpcb_bom.csv | 38-row BOM with LCSC part numbers | Done |
| component_placement_top.csv | CPL file for SMT assembly | Done |
| export_gerbers.sh | One-click Gerber + ZIP generation | Done |
| ROUTING_GUIDE.md | KiCad 8 step-by-step routing guide | Done |
| JLCPCB_ORDER_GUIDE.md | JLCPCB ordering walkthrough + cost estimate | Done |